In S-R latch (NOR), when the SET input is made high, output Q becomes:

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An unclocked R-S flip flop using NOR gates is as shown:

RRB JE EC 25 9Q DE Chapter Test 2 Hindi - Final images q1a

The truth table for the circuit is shown:

Inputs

S     R

Output

 (Qn+1)

Action

0     0

Q

No change

0    1

0

Reset

1    0

1

Set

1    1

0

Race condition (Undefined)

26 June 1

The difference between latches and flip flops is shown

Latches

Flip Flops

Latches are building block of sequential circuits and they are built using logic gates

Flip flops are also building blocks of sequential circuits but they are made using latches

Latches continuously changes input and output changes correspondingly

Flip flop output changes only when clock is applied

Latches are level sensitive

Flip flops are edge sensitive

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